Abstract: Local histogram equalization is a technique commonly used in image enhancement, and it is based on global histogram equalization. In the algorithm, the gray converting function obtained in the neighborhood of one pixel is implemented at the pixel. For increasing the speed of processing, especially for the processing of video or image, it is an optimal choice to implement FPGA because DSP based technique can not meet real-time processing requirement. For the specific implementation of this algorithm on FPGA, some improvements over the traditional algorithm are made. The RTL-level description of the algorithm by VHDL language is achieved. The result was validated on hardware.