基于FPGA的FSO准同步数字复接器的实现

Implementation of plesiochronous digital multiplexer based on FPGA for the FSO system

  • 摘要: 为了实现多路信号在同一大气信道中的传输,提出一种适用于自由空间光通信(FSO)系统的准同步数字复接方案。该方案利用数字复接扩大传输容量,通过加入滤波模块和采用择多判决的方法,提高系统的抗干扰能力。整个系统采用自顶向下模块化的方法进行设计,所有功能模块均用VHDL语言进行描述,并用现场可编程门阵列(FPGA)芯片EP1C3T100C6对整个系统进行硬件实现。以三路准同步数字信号的复接分接为例,给出了软件仿真和硬件实验结果。结果表明系统可以准确、可靠地实现三路准同步信号的复接分接。

     

    Abstract: The paper puts forward a solution of plesiochronous data multiplexer for a free space optical (FSO) system, which makes full use of the capability of digital multiplexer by expanding the transfer capacity, the method takes majority decision measures and uses filter modules which greatly improved the reliability of the whole system. The system was designed by taking TOP DOWN method. All of the functional modules were described in VHDL. The whole system was accomplished by FPGA chip EP1C3T100C6. Taking the multiplexing of three plesiochronous digital as example, the result of simulation agrees with the experiment result. It is concluded that the solution can greatly reduce interference signals and transfer plesiochronous data signal in FSO accurately and reliably.

     

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